1. Technical Field
Embodiments of the present disclosure relate to semiconductor devices, semiconductor systems including the same, and methods of inputting data into the same.
2. Related Art
Fast semiconductor systems with high integration density are increasingly in demand. Semiconductor devices sometimes operate synchronously with external clock signals to improve the operation speed thereof. Synchronous semiconductor devices, for example, double data rate (DDR) devices, may successively receive or output a couple data units of through each data input/output (I/O) pin. The data may be output each cycle of the external clock signal synchronized with every rising edge and every falling edge of the external clock signal.
Semiconductor systems may execute a read training operation for removing a skew between a data signal and a clock signal. The read training operation may be executed using a test that removes the skew between the data signal and the clock signal. The skew may be removed by controlling an input/output (I/O) timing of data according to a characteristic of a channel through which data is inputted or outputted.
Semiconductor systems may be placed in a separate test mode aside from the normal test mode, when executing the read training operation. In such a case, however, time for executing a read operation and a write operation corresponding to inherent operations of the semiconductor systems may be reduced to lower an efficiency of the semiconductor systems.